Technical Field
The present invention relates to semiconductor processing and more particularly to a low temperature epitaxial growth process.
Description of the Related Art
Selective epitaxial growth (SEG) of highly doped silicon is suitable for applications in raised source/drain (S/D) regions to reduce parasitic series resistance associated with shallow-doped S/D regions. However, conventional methods for SEG of silicon require high temperature processing. The typical processing temperatures are greater than 600° C.
The high temperature requirement limits the processes and applications which can utilize the conventional methods for SEG of Si. Further, conventional high temperature depositions (over 600 degrees C.) for epitaxial growth of silicon lack selective growth of Si on predetermined areas, e.g., where the c-Si is exposed.